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Understanding Transactional Memory (HVC 2010)
(Invited Lecture)

By: João Lourenço

The new muticore architectures came to stay, and to make the most out of these architectures software developers must now dip into multi-thrading and parallel programming. But parallel programming is some orders of magnitude harder than sequential programming. The multi-threading makes the program design and coding more demanding. The exponential set of program states makes code coverage and proper program testing much harder. The non-determinism and interference among concurrent threads makes debugging a nightmare. The community needs new programming models and tools to develop highly-parallel programs. Transactional Memory (TM) is an increasingly popular technology that may become the key to unlock the full potential of multicore processors and highly parallel programs. TM gives the same programming model to access in-memory shared data that developers are used to for accessing transactional databases. TM works by wrapping sets of memory accesses in a memory transaction, which are managed by a memory transaction monitor. Like in databases, aborting a memory transaction undoes all pending memory changes, and committing a memory transaction makes the changes undoable and visible to the other threads in the system. Software Transactional Memory is the variant of Transactional Memory which does not require neither use hardware/processor support. STM programs are free from some classical problems in concurrent programming, such as deadlocks. STM programs may still suffer from livelocks and dataraces, and these must be diagnosed and tackled. Although being interesting as a programming model, STM dos not perform well in specific contexts, such as in cases of high-contention in accessing shared memory. Also, sometimes there is an unclear semantic, such as how to proceed when an exception is triggered, or how to execute I/O and other irreversible operations within a memory transaction. In this tutorial, we will start with the basics of Software Transactional Memory (STM), covering both the programming model and implementation techniques. Then, we will discuss what should we study in STM programs to understand their behavior, and how this can be achieved. In our study, we will target both correction and performance issues. We will illustrate the talk with some use cases and tools that can aid in understanding the behavior of software transactional memory programs. We will conclude with some final remarks on challenges and open issues in using and understanding software transactional memory.


Date: 4 Oct 2010

Location/Event: HVC\\\'10: Haifa Verification Conference 2010

url: http://www.research.ibm.com/haifa/conferences/hvc2010

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